In a scale-down of a semiconductor integrated circuit device, e.g., from a 3Xnm node to a 2Xnm node and to an under-2Xnm node, the amount of a parasitic capacitance around a gate electrode cannot be ignored any longer. Generally, a side wall insulation film is formed around the gate electrode, and the side wall insulation film includes several types of films, e.g., a stress liner, an offset spacer and a side wall spacer. A silicon nitride film (SiN film), which has a higher relative permittivity compared to a silicon oxide film (SiO2 film), has widely been used as the side wall insulation film. Thus, there is a need for lowering the permittivity of the side wall insulation film, particularly for replacing the side wall insulation film with an insulation film having a relative permittivity equal to or lower than that of the silicon nitride film.
In order to implement a low permittivity of the side wall insulation film, some insulation films had been reviewed and a silicon oxycarbonitride film (SiOCN film) may be used as one possible solution.
Although in the past, a method of forming a silicon oxycarbonitride film has been used, there is no disclosure of applying the silicon oxycarbonitride film to the side wall insulation film.
The side wall insulation film is formed around the gate electrode by processing the insulation film through an anisotropic dry etching such as a RIE method. Such side wall insulation film is exposed to various etching process during a manufacturing process of the semiconductor integrated circuit device.
For example, if the gate electrode, a source diffusion layer and a drain diffusion layer are subject to a silicide technology, they are exposed to a wet etching after performing a dry etching and before forming a metal film. Thereafter, they are exposed to the dry etching or the wet etching when removing an unreactive portion of the metal film.
Further, if a self-aligned contact technology is applied, the side wall insulation film is exposed to the anisotropic dry etching such as the RIE method when forming a contact hole as an interlayer insulation film. Therefore, the insulation film, which is used for the side wall insulation film, should be provided to have an excellent resistance when exposed to a dry etching process and/or a wet etching process.
Further, recently, there is a need for enhancing productivity in the field of manufacturing semiconductor integrated circuit devices. Particularly, as one solution for enhancing productivity, an enhancement of a throughput (e.g., enhancing a growth rate of a film to reduce a processing time) becomes increasingly important.